In a semiconductor integrated circuit, a voltage drop occurs when an electric current flows. When this happens, the operation time changes depending on the amount of voltage drop. In the present description, a time period required for performing a one cycle of process in the semiconductor integrated circuit, from a time when an input signal is input to a time when an output signal is output after executing a predetermined processing, is called operation time. The operation time arises out of the propagation delay of each element constituting the semiconductor integrated circuit. Note that a long operation time may be referred to as “the operation speed of the circuit is slow”; and a short operation time maybe referred to as “the operation speed is fast”.
In the actual manufacturing, the manufactured products may differ in manufacturing characteristics depending on the manufacturing processes or the quality of the material. For example, some manufactured products may have a longer or shorter operation time than a design target value that is set at the design phase.
Patent Document 1 identified below discloses a technology for designing a semiconductor integrated circuit by setting margins so that a normal operation can be ensured even if the operation time exceeds the design target value.
Patent Document 1: Japanese Patent Application Publication No. 2005-3529916